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What is Cache Memory – Computer Hardware

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CPU Memory Access Hierarchy Chart. Level 3 cache is now common.

Cache Memory

Even with a wide and fast bus, it still takes longer for data to get from the memory card to the CPU than it takes for the CPU to actually process the data. Caches are designed to alleviate this bottleneck by making the data that is used most often by the CPU instantly available. This is accomplished by building a small amount of memory, known as primary or level 1 cache, right into the CPU. Level 1 cache is very small, e.g. 384 KB L1 cache for the Intel i7 Hexacore.

The secondary or level 2 cache typically resided on a memory card located near the CPU with a direct connection to the CPU. A dedicated integrated circuit on the motherboard, the L2 controller, regulates the use of the level 2 cache by the CPU. e.g. 1.5 MB L2 cache for the Intel i7 Hexa core. In most systems, data needed by the CPU is accessed from the cache approximately 95 percent of the time, greatly reducing the overhead needed when the CPU has to wait for data from the main memory.

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Some inexpensive systems dispense with the level 2 cache altogether. Many high-performance CPUs now have the level 2 cache actually built into the CPU chip itself as well as a level 3 cache. Therefore, the size of the level 2 cache and whether it is onboard (on the CPU) is a major determining factor in the performance of a CPU. e.g. 12 MB L3 cache for the Intel i7 Hexacore.

CPU Memory Access Hierarchy Chart. Level 3 cache is now common.CPU Memory Access Hierarchy Chart. Level 3 cache is now common.

How Caching Operates:

A particular type of RAM, static random access memory (SRAM), is used primarily for the cache. SRAM uses multiple transistors, typically four to six, for each memory cell. It has an external gate array known as a bistable multivibrator that switches, or flipflops, between two states. This means that it does not have to be continually refreshed like DRAM. Each cell will maintain its data as long as it has power. This means SRAM can operate extremely quickly, significantly faster than dynamic RAM. However, the complexity of each cell means it takes up a lot more space on a chip and makes it prohibitively expensive for use as standard RAM.

Static RAM is fast and expensive, and dynamic RAM is less expensive and slower. Thus static RAM is used to create the CPU’s speed-sensitive cache, while dynamic RAM forms the larger system RAM space.

Some principles of cache operation are as follows:

  1. Cache technology is the use of a faster but smaller memory type to accelerate a slower but larger memory type, such as RAM.
  2. When using a cache, you must check the cache to see if an item is in there. If it is there, it’s called a cache hit. If not, it is called a cache miss and the computer must wait for a round trip from the larger, slower main memory area.
  3. A cache has some maximum size that is much smaller than the larger main memory storage area.
  4. It is possible to have multiple cache layers. In a one-level cache, the Level 1 cache is first checked, if there is a miss, the RAM is searched. In a two-level cache, the Level 1 cache is first checked, if there is a miss, the Level 2 cache is checked, if there is a miss, the RAM is searched.
  5. The cache is populated using a concept called locality of reference. It means that in a fairly large program, only small portions are ever used at any one time. Even if an executable is 10 MB in size, only a handful of bytes from that program are in use at any one time, and their rate of repetition is very high.

Registers:

The final step in memory hierarchy is the registers. These are memory cells built right into the CPU that contain specific data needed by the CPU, particularly the arithmetic and logic unit (ALU). An integral part of the CPU itself, they are controlled directly by the compiler that sends information for the CPU to process.

This post contains the content of book Computer Hardware_ Hardware Components and Internal PC Connection

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